A General Guide to Applying Machine Learning to Computer Architecture

  • Daniel Nemirovsky Barcelona Supercomputing Center (BSC)
  • Tugberk Arkose BSC
  • Nikola Markovic Microsoft
  • Mario Nemirovsky ICREA, BSC
  • Osman Unsal UPC, BSC
  • Adrian Cristal UPC, BSC
  • Mateo Valero UPC, BSC

Abstract

The resurgence of machine learning since the late 1990s has been enabled by significant advancesin computing performance and the growth of big data. The ability of these algorithms to detect complex patterns in data which are extremely difficult to achieve manually, helps to produce effective predictive models. Whilst computer architects have been accelerating the performance of machine learning algorithms with GPUs and custom hardware, there have been few implementations leveraging these algorithms toimprove the computer system performance. The work that has been conducted, however, has produced considerably promising results. The purpose of this paper is to serve as a foundational base and guide to future computer architecture research seeking to make use of machine learning models for improving system efficiency. We describe a method that highlights when, why, and how to utilize machine learning models for improving system performance and provide a relevant example showcasing the effectiveness of applying machine learning in computer architecture. We describe a process of data generation every execution quantum and parameter engineering. This is followed by a survey of a set of popular machine learning models. We discuss their strengths and weaknesses and provide an evaluation of implementations for the purpose of creating a workload performance predictor for different core types in an x86 processor. The predictions can then be exploited by a scheduler for heterogeneous processors to improve the system throughput. The algorithms of focus are stochastic gradient descent based linear regression, decision trees, random forests, artificial neural networks, and $k$-nearest neighbors. 

Author Biographies

Daniel Nemirovsky, Barcelona Supercomputing Center (BSC)
Dr. Daniel Alexander Nemirovsky has a background in Computer Engineering and Political Philosophy, studying at University of Michigan, University of Manchester, the Polytechnic University of Catalonia and Pompeu Fabra University. He graduated with a Ph.D in October 2017 receiving cum laude honors. Highlights from his 7+ years of research include pioneering work on heterogeneous architectures and applying machine learning to increase system efficiency. He currently resides in San Francisco, CA and his research interests include IoT and applying machine learning in the field of computer architecture.
Tugberk Arkose, BSC
Tugberk is a P.h.D student with a passion for distributed computing, machine learning, and systems engineering.
Nikola Markovic, Microsoft
Experienced Software Design Engineer with a demonstrated history of working in the computer software industry. Skilled in Computer Science, Computer Architecture, C++, Algorithms, Big Data. Strong engineering professional with a Doctor of Philosophy (Ph.D.) focused in Computer Architecture from Universitat Politècnica de Catalunya.
Mario Nemirovsky, ICREA, BSC
Mario Nemirovsky is an ICREA Research Professor at the Barcelona Supercomputing Center, where he has been since 2007. He received his PhD in ECE from University of California, Santa Barbara, in 1990. Presently he is conducting pioneering work in the area of IoT (Fog as plataform for IoT and HEB - Hierarchical Emergent Behaviors), Disagregated Computing, HPC, Memory systems, Cloud Computing. He holds 65 USA patents. During his tenure with the University of California, Santa Barbara, Mario co-authored seminal works on simultaneous multithreading. Mario has made key contributions to other areas of computer architecture, including high performance, real-time, and network processors. He founded Miraveo Inc., Vilynx Inc., ConSentry Networks Inc., Flowstorm Inc. and XStream Logic Inc. Before that, he was a chief architect at National Semiconductor, PI Researcher at Apple Computers, and Chief Architect at Weitek Inc. and Delco Electronics, General Motors (GM).
Osman Unsal, UPC, BSC
Osman Sabri Ünsal is co-leader of the Architectural Support for Programming Models group at the Barcelona Supercomputing Center.  Dr. Ünsal  was also a researcher at the BSC-Microsoft Research Centre from 2006 to 2014.He holds BS, MS, and PhD degrees in electrical and computer engineering from Istanbul Technical University, Brown University, and University of Massachusetts, Amherst, respectively.
Adrian Cristal, UPC, BSC
Adrián Cristal received the “licenciatura” in Compuer Science from Universidad de Buenos Aires (FCEN) in 1995 and the PhD. degree in Computer Science in 2006, from the Universitat Politécnica de Catalunya (UPC), Spain. From 1992 to 1995 he has been lecturing in Neural Network and Compiler Design. In UPC, from 2003 to 2006 he has been lecturing on computer organization.Currently, and since 2006, he is researcher in Computer Architecture group at BSC. He is currently co-manager of the “Computer Arquitecture for parallel paradigms”. His research interests cover the areas of microarchitecture, multicore architectures, and programming models for multicore architectures. He has published around 60 publications in these topics and participated in several research projects with other universities and industries, in framework of the European Union programmes or in direct collaboration with technology leading companies.
Mateo Valero, UPC, BSC
Mateo Valero obtained his Telecommunication Engineering Degree from the Technical University of Madrid (UPM) in 1974 and his Ph.D. in Telecommunications from the Technical University of Catalonia (UPC) in 1980. Since 1974 he is a professor in the Computer Architecture Department at UPC, in Barcelona and since 1983 he is full professor. His research interests focuses on high performance architectures. He has published approximately 500 papers, has served in the organization of more than 300 International Conferences and he has given more than 300 invited talks. He is the director of the Barcelona Supercomputing Centre, the National Centre of Supercomputing in Spain.In December 1994, Professor Valero became a founding member of the Royal Spanish Academy of Engineering. In 2005 he was elected Correspondant Academic of the Spanish Royal Academy of Science and in 2006, member of the Royal Spanish Academy of Doctors and member of the “Academia Europaea”, the “Academy of Europe”. He is a Fellow of the IEEE, Fellow of the ACM and an Intel Distinguished Research Fellow. 

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Published
2018-04-23